3-Input K-Map Function Implementation in VLSI

|Mr.Mashalkar Y.S. | Gavkare Shravan |Nagapure Shivam |Jadhav Shailesh|Jadhav Prasad |
Senior Lecturer, Department of Electronics And Telecommunication
Students, Department of Electronics and Telecommunication Vishweshwarayya Institute Of Engineering &Telecommunication, Almala,India

Abstract-This paper presents the design and implementation of a three-input K-Map function using VLSI technology.Karnaugh Map (K-Map) is a simplification technique used to minimize Boolean expressions. The simplified logic isimplemented using basic logic gates and further realized using VLSI design concepts. The objective is to reduce hardware complexity, power consumption, and propagation delay. The implementation is verified using simulation tools and logic design methods.
Keywords—K-Map, VLSI, Boolean Algebra, Logic Gates, Digital Design