Design and Simulation of AXI4-Lite Bus Communication System for Efficient On-Chip Data Transfer

Santosh Kumar 1, Dr.Sharanbasappa Shetkar 2, Dr.Basavalinga Swami 3 , Prof .Sadhana C 4  , Dr.Vinita Patil 5

1Santosh Kumar Dept of VLSI Design and Embedded system, M.Tech student, LAEC, Bidar

2 Dr.Sharanbasappa Shetkar, Professor, Department of ECE, LAEC Bidar

3Dr.Basavalinga Swamy, Associate Professor, Department of ECE,LAEC Bidar

4 Sadhana C, Professor, Department of ECE, LAEC Bidar

5Dr.Vinita Patil, Professor, Department of ECE, LAEC Bidar

Abstract - The rapid advancement of System-on-Chip (SoC) technology has increased the demand for reliable and efficient communication between embedded processing units and peripheral devices. The AXI4-Lite protocol, a lightweight member of the advanced eXtensible Interface (AXI) family, is extensively adopted for low-bandwidth memory-mapped communication because of its simplified architecture and predictable performance. This research presents the design and simulation of an AXI4-Lite bus communication system capable of supporting efficient register-level data transactions between a master and a slave module.

The proposed design is developed using Verilog Hardware Description Language (HDL) and verified through simulation. Independent read and write communication channels are implemented following the AXI4-Lite specification, ensuring synchronized address and data transfer through VALID and READY handshake mechanisms. Functional verification is performed using a dedicated testbench, and signal behavior is analyzed using GTKWave.

Simulation results confirm that the proposed architecture successfully performs write-address transmission, write-data transfer, write response generation, read-address acceptance, and read-data delivery while maintaining protocol compliance. The design offers low hardware complexity, deterministic communication latency, and improved reliability for embedded applications. The proposed implementation is suitable for FPGA-based systems, microcontroller peripherals, configuration registers, sensor interfaces, and other control-oriented digital systems where high throughput is not required.

KeyWords— AXI4-Lite, AMBA, Verilog HDL, System-on-Chip, FPGA, On-Chip Communication, Bus Protocol, GTKWave..