Design and Implementation of an Efficient Quantum Cost Optimized Full Adder Using Reversible Logic Gates
Design and Implementation of an Efficient Quantum Cost Optimized Full Adder Using Reversible Logic Gates
Ms. S. Bhavani
Assistant Professor Department ofElectronics and Communication
EngineeringAnnamacharya Institute of Technologyand Sciences
Tirupati, Indiabhavanisangadala433@gmail.com
Pranava Sai Deepak Achari
Kammara Department of Electronicsand Communication Engineering
Annamacharya Institute of Technologyand Sciences
Tirupati, Indiapranavsai934@gmail.com
Yeswanthi Venkatadri Department
of Electronics and CommunicationEngineering
Annamacharya Institute of Technologyand Sciences
Tirupati, Indiayeswanthi082@gmail.com
Vamsi Thota Department of
Electronics and CommunicationEngineering
Annamacharya Institute of Technologyand Sciences
Tirupati, Indiavamsiroyal80@gmail.com
Lakshmi Priya Bayalraju Department
of Electronics and CommunicationEngineering
Annamacharya Institute of Technologyand Sciences
Tirupati, Indialakshmipriyabayalraju@gmail.com
Pushkar Nallangadu Department of
Electronics and CommunicationEngineering
Annamacharya Institute of Technologyand Sciences
Tirupati, Indiapushkarnallangadu2005@gmail.com
Abstract—In the context of modern Very Large-Scale Integration (VLSI) technology, information loss has been a major concern. Logic gates (LG) such as AND, OR, and NOT have been found to result in information loss during their operations. To address this issue, reversible LGs have been created. The development and implementation of a high-speed, efficient full adder circuit employing reversible LGs like Feynman, Toffoli, and Peres gates. The design aims to improve computational and thermal efficiencies. The circuit refarding quantum costs (QC), garbage outputs, and ancillary inputs. The implemented the suggested design in Verilog and verified the entire adder's functionality and efficiency through simulations using the Xilinx Vivado and Xilinx ISE tools. The circuit has a quantum cost of 10 with two outputs of useless and one auxiliary input, according to the researchers, highlighting its opportunities for usage in quantum computing applications andlow-power (dec 84%), high-performance computing systems.